Void formation in charge trap structures
AssigneeMicron Technology, Inc.
InventorsChris M. Carlson, Ugo Russo
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsChris M. Carlson, Ugo Russo
Estimating the term…
Electronic apparatus and methods of forming the electronic apparatus may include one or more charge trap structures for use in a variety of electronic systems and devices, where each charge trap structure includes a dielectric barrier between a gate and a blocking dielectric on a charge trap region of the charge trap structure. In various embodiments, a void is located between the charge trap region and a region on which the charge trap structure is disposed. In various embodiments, a tunnel region separating a charge trap region from a semiconductor pillar of a charge trap structure, can be arranged such that the tunnel region and the semiconductor pillar are boundaries of a void. Additional apparatus, systems, and methods are disclosed.
A memory device comprising:
A method of forming a memory device, the method comprising:
Dependencies are inferred from the claim text.