Boundary design for high-voltage integration on hkmg technology

A method of forming an integrated circuit (IC), comprising:

• providing a substrate comprising a low voltage region, a high voltage region, and a boundary region defined between the low voltage region and the high voltage region;
• forming a supporting layer over the substrate in the high voltage region, wherein the supporting layer has a slanted sidewall in the boundary region that is tilted to the high voltage region from bottom to top;
• forming a stack of low voltage gate precursor layers over the substrate in the low voltage region and on the supporting layer in the high voltage region;
• and
• patterning the stack of low voltage gate precursor layers to form an altered low voltage gate precursor layer in the low voltage region;
• wherein the stack of low voltage gate precursor layers is removed from the boundary region and the high voltage region when forming the altered low voltage gate precursor layer.

A method of forming an integrated circuit (IC), comprising:

• providing a substrate comprising a low voltage region, a high voltage region, and a boundary region defined between the low voltage region and the high voltage region;
• forming and patterning a first supporting layer over the substrate in the high voltage region;
• forming a second supporting layer over the substrate in the low voltage region and on the first supporting layer in the high voltage region;
• performing an etching process to the second supporting layer and the first supporting layer to remove the second supporting layer from the low voltage region and to form a slanted sidewall in the boundary region;
• and
• forming a stack of low voltage gate precursor layers over the substrate in the low voltage region and over the first supporting layer in the high voltage region;
• and
• patterning the stack of low voltage gate precursor layers to form a low voltage transistor device in the low voltage region.