Methods and apparatuses for aligning read data in a stacked semiconductor device

An apparatus comprising:

• a first die comprising a first replica align circuit, wherein the first replica align circuit includes first variable delay circuitry;
• and
• a second die coupled to the first die and comprising a second replica align circuit, wherein the second replica align circuit includes second variable delay circuitry;
• a first conductive path between the first die and the second die configured to provide read data from the second die;
• and
• a second conductive path between the first die and the second die configured to perform a read data align operation, wherein the second conductive path includes the first replica align circuit and the second replica align circuit,
• wherein, during a read data align operation, the first variable delay circuitry is set to apply a first delay to respective received signals based on a first propagation delay through the first replica align circuit, wherein, in response to the first variable delay circuitry being set to apply the first delay, the second variable delay circuitry is set to apply a second delay to the respective received signals based on a comparison between a second propagation delay through the second replica align circuit and the first propagation delay.