Methods of designing semiconductor devices, design systems performing the same and methods of manufacturing semiconductor devices using the same

A design system comprising:

• a first electronic design automation (EDA) tool comprising a first computer program that is configured to design a first sub-block included in a semiconductor device;
• and
• a second EDA tool comprising a second computer program that is configured to design a second sub-block included in the semiconductor device, the second EDA tool being different from the first EDA tool,
• wherein the first EDA tool and the second EDA tool are further configured to design different physical structures from a same logical block,
• wherein the second EDA tool is further configured to generate a second sub-block model corresponding to the second sub-block and to generate a first sub-block model by transforming first logical information and first physical information associated with a result of designing the first sub-block to be compatible with the second EDA tool,
• wherein the first sub-block model and the second sub-block model are compatible with the second EDA tool, and
• wherein an integrated physical design for the semiconductor device is obtained by combining the first sub-block and the second sub-block based on the first sub-block model and the second sub-block model.

A method of designing a semiconductor device, the method comprising:

• designing a first sub-block included in the semiconductor device using a first design scheme;
• designing a second sub-block included in the semiconductor device using a second design scheme that is different from the first design scheme, wherein the first design scheme and the second design scheme are configured to design different physical structures from a same logical block;
• generating a first sub-block model corresponding to the first sub-block and a second sub-block model corresponding to the second sub-block by transforming logical information and physical information associated with one of a result of designing the first sub-block using the first design scheme or a result of designing the second sub-block using the second design scheme such that the first sub-block model and the second sub-block model are both compatible with the first design scheme or the second design scheme;
• and
• obtaining an integrated physical design for the semiconductor device by combining the first sub-block and the second sub-block based on the first sub-block model and the second sub-block model.