Interrupt monitoring systems and methods for failure detection for a semiconductor device

A semiconductor device comprising:

• a first processor that performs a predetermined interrupt in response to an interrupt request;
• a plurality of circuit blocks, each outputting an interrupt signal;
• a first interrupt control circuit that receives the interrupt signals from the circuit blocks and outputs the interrupt request to the first processor;
• and
• at least one interrupt monitoring circuit that corresponds to at least one of the interrupt signals and includes a setting circuit for setting a monitoring type and a monitoring period, the monitoring type indicating a monitoring state of the corresponding interrupt signal,
• wherein if the monitoring type indicates an asserted state of the interrupt signal, the interrupt monitoring circuit monitors the asserted state, and if a first duration of the continuous asserted state exceeds a first monitoring period, the interrupt monitoring circuit detects the state as a failure,
• wherein if the monitoring type indicates a negated state of the interrupt signal, the interrupt monitoring circuit monitors the negated state, and if a second duration of the continuous negated state exceeds a second monitoring period, the interrupt monitoring circuit detects the state as a failure,
• wherein the interrupt signals include a first interrupt signal and a second interrupt signal, and
• wherein the semiconductor device includes:
• a first interrupt monitoring circuit corresponding to the first interrupt signal;
• and
• a second interrupt monitoring circuit corresponding to the second interrupt signal.

A semiconductor device comprising:

• a first processor that performs a predetermined interrupt in response to an interrupt request;
• a plurality of circuit blocks, each outputting an interrupt signal;
• a first interrupt control circuit that receives the interrupt signals from the circuit blocks and outputs the interrupt request to the first processor;
• and
• at least one interrupt monitoring circuit that corresponds to at least one of the interrupt signals and includes a setting circuit for setting a monitoring type and a monitoring period, the monitoring type indicating a monitoring state of the corresponding interrupt signal,
• wherein if the monitoring type indicates an asserted state of the interrupt signal, the interrupt monitoring circuit monitors the asserted state, and if a first duration of the continuous asserted state exceeds a first monitoring period, the interrupt monitoring circuit detects the state as a failure,
• wherein if the monitoring type indicates a negated state of the interrupt signal, the interrupt monitoring circuit monitors the negated state, and if a second duration of the continuous negated state exceeds a second monitoring period, the interrupt monitoring circuit detects the state as a failure,
• wherein the semiconductor device includes the at least two interrupt monitoring circuits respectively provided for at least two of the interrupt signals,
• wherein in the semiconductor device, a reference address is set to collectively refer to the monitoring types set in the setting circuits respectively provided in the at least two interrupt monitoring circuits, and
• wherein the semiconductor device further includes an access control circuit that reads the monitoring types from the setting circuits in response to an access request for the reference address and collectively sends the read monitoring types to a source of the access request.

A semiconductor device comprising:

• a first processor that performs a predetermined interrupt in response to an interrupt request;
• a plurality of circuit blocks, each outputting an interrupt signal;
• a first interrupt control circuit that receives the interrupt signals from the circuit blocks and outputs the interrupt request to the first processor;
• at least one interrupt monitoring circuit that corresponds to at least one of the interrupt signals and includes a setting circuit for setting a monitoring type and a monitoring period, the monitoring type indicating a monitoring state of the corresponding interrupt signal;
• the at least two interrupt monitoring circuits respectively provided for at least two of the interrupt signals;
• and
• a plurality of frequency dividers that divides a frequency at different division ratios with respect to an operation clock,
• wherein the at least two interrupt monitoring circuits are activated by the operation clock supplied from at least some of the frequency dividers,
• wherein if the monitoring type indicates an asserted state of the interrupt signal, the interrupt monitoring circuit monitors the asserted state, and if a first duration of the continuous asserted state exceeds a first monitoring period, the interrupt monitoring circuit detects the state as a failure,
• wherein if the monitoring type indicates a negated state of the interrupt signal, the interrupt monitoring circuit monitors the negated state, and if a second duration of the continuous negated state exceeds a second monitoring period, the interrupt monitoring circuit detects the state as a failure.