Management of non-volatile memory arrays

A system comprising:

• a memory array comprising a plurality of devices;
• a digital-to-analog converter configured to convert a digital signal to an analog signal as a voltage or current signal;
• a plurality of sample and hold circuits configured to receive the analog signal and store the analog signal as a charge;
• an address controller configured to regulate which sample and hold circuits of the plurality of sample and hold circuits propagate the analog signal, the sample and hold circuits configured to feed the analog signal to the plurality of devices;
• an output circuit configured to program the plurality of devices by comparing currents of the plurality of devices to their corresponding target currents, in response to one or more of the currents of the plurality of devices being within a threshold range of the corresponding target currents, the output circuit discontinues programming the corresponding devices of the plurality of devices, in response to one or more of the currents of the plurality of devices not being within the threshold range of the target currents, the output circuit continues programming the corresponding devices of the plurality of devices;
• a counter configured to generate a counter signal;
• a plurality of output digital-to-analog converters configured to generate a plurality of current signals based on the counter signal;
• a plurality of comparators configured to receive and compare the plurality of current signals based on the counter signal and the currents of the plurality of devices, in response to one or more of the currents of the plurality of devices being within a threshold of the current signals based on the counter signal, the plurality of comparators configured to change a sign of one or more corresponding signals of a plurality of signals generated by the plurality of comparators;
• and
• a plurality of registers configured to receive the plurality of signals output by the plurality of comparators and in response to the sign of one or more corresponding signals of the plurality of signals output by the plurality of comparators changing, the corresponding registers of the plurality of registers store a corresponding signal of the plurality of signals output by the counter.