Storage devices, data storage systems and methods of operating storage devices

A storage device comprising:

• a plurality of nonvolatile memory devices configured to store mapping tables and directories, each of the plurality of nonvolatile memory devices including:
• a memory cell array including a plurality of memory cells;
• an address decoder coupled to the memory cell array through a plurality of word lines;
• a page buffer circuit coupled to the memory cell array through a plurality of bit lines;
• a data input/output (I/O) circuit coupled to the page buffer circuit through a plurality of data lines;
• a control circuit configured to control the page buffer circuit and the data input/output circuit;
• and
• a voltage generator configured to generate word line voltages;
• and
• a storage controller configured to control the plurality of nonvolatile memory devices and including:
• a processor configured to perform an operation for data exchange between an external device and the plurality of nonvolatile memory devices;
• an error correction code (ECC) unit configured to generate an error correction code (ECC) for data that is received from the external device;
• a first interface through which the processor communicates with the external device;
• a second interface through which the processor communicates with the plurality of nonvolatile memory devices;
• and
• a loading controller configured to provide to the external device at least a portion of the directories in a first mode, and configured to provide to the external device at least a portion of the mapping tables and at least a portion of the directories in a second mode,
• wherein the mapping tables indicate a mapping relationship between a physical address and a logical address of corresponding ones of the plurality of nonvolatile memory devices, and
• the directories are configured to store address information of the mapping tables.

A storage device comprising:

• a plurality of nonvolatile memory devices configured to store mapping tables and directories;
• and
• a storage controller configured to control the plurality of nonvolatile memory devices and to perform a memory operation on a memory region of the plurality of nonvolatile memory devices, the storage controller including:
• a processor configured to perform an operation for data exchange between an external device and the plurality of nonvolatile memory devices;
• an error correction code (ECC) unit configured to generate an error correction code (ECC) for data that is received from the external device;
• a first interface through which the processor communicates with the external device;
• a second interface through which the processor communicates with the plurality of nonvolatile memory devices;
• and
• a loading controller, based on a size of a buffer memory and/or locality information, configured to load to the buffer memory at least a portion of directories in a first mode and configured to load to the buffer memory at least a portion of mapping tables and at least a portion of the directories in a second mode,
• wherein the first mode includes preferential loading of the directories from the plurality of nonvolatile memory devices to the buffer memory, and
• the second mode includes merged loading of the directories and the mapping tables from the plurality of nonvolatile memory devices to the buffer memory.