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AssigneeTexas Instruments Incorporated
InventorsRoland Karl Son, Craig Bennett Greenberg, Indumini Ramuthu
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A system includes an output terminal and a linear switch circuit coupled to the output terminal. The linear switch circuit includes a first power field-effect transistor (FET) having: a first channel width; a control terminal; a first current terminal; and a second current terminal, wherein the second current terminal is coupled to the output terminal. The linear switch circuit also includes a second power FET having: a second channel width smaller than the first channel width; a control terminal; a first current terminal coupled to the first current terminal of the first power FET; and a second current terminal coupled to the output terminal. The system also comprises a control circuit coupled to the control terminal of the first power FET and to the control terminal of the second power FET. The control circuit detects a drain-to-source voltage (VDS) saturation condition and controls the first and second power FETs accordingly.
A circuit adapted to be coupled to a first gate of a first field-effect transistor (FET) gage and to a second gate of a second FET gate, the circuit, comprising:
A circuit, comprising:
A circuit adapted to be coupled to a first gate of a first field-effect transistor (FET) gage and to a second gate of a second FET gate, the circuit, comprising:
Dependencies are inferred from the claim text.