Systems and Methods for Generating a Controllable-Width Pulse Signal
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsRuey-Bin Sheen, Ming Hsien Tsai, Chih-Hsien Chang, Tsung-Hsien Tsai
Life of this patent
Estimating the term…
Loading patent…
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsRuey-Bin Sheen, Ming Hsien Tsai, Chih-Hsien Chang, Tsung-Hsien Tsai
Estimating the term…
Systems, methods, and devices are provided for a circuit for generating a pulse output having a controllable pulse width. Systems and methods may include a delay line having a plurality of stages. A delay per stage calculation circuit is configured to determine a per-stage delay of the delay line using a first clock input. A pulse generation circuit is configured to generate the pulse output using the delay line based on the per-stage delay using a second clock input, the second clock input having a lower frequency than the first clock input.
A circuit for generating a pulse output having a controllable pulse width, comprising:
A method of generating a pulse output having a controllable pulse width, comprising:
A circuit for generating a pulse output having a pulse width of a controllable length of time, comprising:
Dependencies are inferred from the claim text.