System and method for esd protection

An electrostatic discharge (ESD) circuit comprising:

• a primary ESD protection circuit coupled to a first node;
• and
• a secondary ESD protection circuit coupled between the first node and a second node configured to be coupled to a first circuit to be protected, the secondary ESD protection circuit comprising
• a current limiting element coupled between the first node and the second node,
• a first MOS transistor having a first load path coupled between a first supply node and the second node,
• a second MOS transistor having a second load path coupled between the second node and a second supply node, wherein the first MOS transistor and the second MOS transistor are disposed in at least one well, and
• a bias circuit coupled to a first gate of the first MOS transistor, a first bulk connection of the first MOS transistor, a second gate of the second MOS transistor, and a second bulk connection of the second MOS transistor, wherein the bias circuit is coupled to the primary ESD circuit only via the first supply node, the second supply node, the first MOS transistor, or via the second MOS transistor.

An integrated circuit comprising:

• a first power domain comprising a first circuit coupled to a first power supply node and a first reference node;
• a second power domain comprising
• a second circuit coupled to a second power supply node and a second reference node,
• a secondary electrostatic discharge (ESD) circuit coupled between the first circuit at a first node and the second circuit at a second node, the secondary ESD circuit comprising
• at least one MOS transistor having a load path coupled to the second node, wherein the at least one MOS transistor is disposed in a well,
• a current limiting element coupled between the first node and the second node;
• a first ESD coupling circuit coupled between the first reference node and the second reference node;
• and
• a bias circuit coupled to a gate and bulk connection of the at least one MOS transistor.