Chip radio frequency package and radio frequency module

A radio frequency module, comprising:

• a core member including a through-hole, a core insulating layer, and a core via disposed to penetrate the core insulating layer;
• a front-end integrated circuit (FEIC) disposed in a through-hole of the core member;
• a first connection member, disposed on a lower surface of the core member, and having a first stacked structure in which at least one first insulating layer and at least one first wiring layer are alternately stacked, and the first wiring layer is electrically connected to the core via;
• a second connection member, disposed on an upper surface of the core member, having a second stacked structure in which at least one second insulating layer and at least one second wiring layer are alternately stacked, and the second wiring layer is electrically connected to the core via;
• a radio frequency integrated circuit (RFIC) disposed on an upper surface of the second connection member, and configured to input or output a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, through the at least one second wiring layer;
• a substrate disposed on a lower surface of the first connection member;
• and
• an electrical connection structure configured to electrically connect the first connection member and the substrate,
• wherein the FEIC is configured to input or output the first RF signal and a second RF signal which has a power different from a power of the first RF signal.

A chip radio frequency package comprising:

• a first connection member including a first insulating layer and a first wiring layer;
• a second connection member including a second insulating layer and a second wiring layer;
• a core member disposed between the first connection member and the second connection member, and configured to be electrically connected to the first wiring layer and the second wiring layer;
• a radio frequency integrated circuit (RFIC), disposed above the second connection member, and configured to process a base signal and a first radio frequency (RF) signal, and
• a front-end signal integrated circuit (FEIC), disposed in a through-hole of the core member, and configured to amplify the first RF signal to generate a second RF signal, or amplify the second RF signal to generate the first RF signal,
• wherein the FEIC is configured to process the first RF signal and a second RF signal which has a power different from a power of the first RF signal.