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US 2021/0242325 A1Published application
Gate electrode having a capping layer
AssigneeIntel Corporation
InventorsGilbert DEWEY, Mark L. DOCZY, Suman DATTA, Justin K. BRASK, Matthew V. METZ
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Abstract
A method of manufacturing a semiconductor device and a novel semiconductor device are disclosed herein. An exemplary method includes sputtering a capping layer in-situ on a gate dielectric layer, before any high temperature processing steps are performed.
Claims21
An integrated circuit structure, comprising:
- a semiconductor body;
- a gate stack over the semiconductor body, the gate stack comprising:
- a gate dielectric layer, the gate dielectric layer comprising hafnium and oxygen;
- a first layer above the gate dielectric layer, the first layer comprising nitrogen and silicon;
- and
- a second layer above the first layer, the second layer comprising aluminum and titanium;
- a first source or drain region in the semiconductor body at a first side of the gate stack;
- and
- a second source or drain region in the semiconductor body at a second side of the gate stack, the second side opposite the first side.
6 more elements
A method for forming an integrated circuit structure, comprising:
- forming a semiconductor body;
- forming a gate stack over the semiconductor body, forming the gate stack comprising:
- forming a gate dielectric layer, the gate dielectric layer comprising hafnium and oxygen;
- forming a first layer above the gate dielectric layer, the first layer comprising nitrogen and silicon;
- forming a sacrificial layer, the sacrificial layer comprising polysilicon;
- removing the sacrificial layer;
- and
- forming a second layer above the first layer, the second layer comprising aluminum and titanium;
- forming a first source or drain region in the semiconductor body at a first side of the gate stack;
- and
- forming a second source or drain region in the semiconductor body at a second side of the gate stack, the second side opposite the first side.
8 more elements
An integrated circuit structure, comprising:
- a semiconductor body;
- a gate stack over the semiconductor body, the gate stack comprising:
- a gate dielectric region, the gate dielectric region comprising hafnium and oxygen;
- a first region above the gate dielectric region, the first region comprising nitrogen and silicon;
- and
- a second region above the first region, the second region comprising aluminum and titanium;
- a first source or drain region in the semiconductor body at a first side of the gate stack;
- and
- a second source or drain region in the semiconductor body at a second side of the gate stack, the second side opposite the first side.
6 more elements
Dependencies are inferred from the claim text.