Semiconductor device and method of forming the same

A semiconductor device comprising:

• a substrate including an active region;
• a gate trench disposed in the substrate and crossing the active region;
• a gate dielectric layer disposed in the gate trench;
• a first gate electrode disposed on the gate dielectric layer and including titanium nitride, the first gate electrode including a center portion and an edge portion that is adjacent to the center portion;
• a second gate electrode disposed on the first gate electrode and including a doped polysilicon material;
• a gate capping insulating layer disposed on the second gate electrode;
• and
• a first impurity region and a second impurity region disposed in the substrate, the first impurity region being disposed opposite to the second impurity region with respect to the gate trench,
• wherein a top surface of each of the center portion and the edge portion of the first gate electrode contacts a bottom surface of the second gate electrode,
• a top surface of the second gate electrode is concave,
• a bottom surface of the gate capping insulating layer is convex,
• a side surface of the gate capping insulating layer contacts the gate dielectric layer, and
• the bottom surface of the second gate electrode is disposed lower than a bottom surface of the first impurity region and is disposed higher than a bottom surface of the second impurity region.

A semiconductor device comprising:

• a substrate including an active region;
• a gate trench disposed in the substrate and crossing the active region;
• a gate dielectric layer disposed in the gate trench;
• a first gate electrode disposed on the gate dielectric layer and including titanium nitride, the first gate electrode including a center portion and an edge portion that is adjacent to the center portion;
• a second gate electrode disposed on the first gate electrode and including a doped polysilicon material;
• a first gate capping insulating layer disposed on the second gate electrode and including silicon oxide, silicon nitride, or silicon oxynitride;
• and
• a second gate capping insulating layer disposed on the first gate capping insulating layer and filling the gate trench,
• wherein a top surface of each of the center portion and the edge portion of the first gate electrode contacts a bottom surface of the second gate electrode,
• a top surface of the second gate electrode is concave, and
• a side surface of the first gate capping insulating layer contacts the gate dielectric layer.

A semiconductor device comprising:

• a substrate including an active region;
• a gate trench disposed in the substrate and crossing the active region;
• a gate dielectric layer disposed in the gate trench;
• a first gate electrode disposed on the gate dielectric layer;
• a second gate electrode disposed on an inner side surface and an inner bottom surface of the first gate electrode;
• a third gate electrode disposed on a top surface of the first gate electrode and a top surface of the second gate electrode, the third gate electrode including a doped polysilicon material;
• a first gate capping insulating layer disposed on the second gate electrode and including silicon oxide, silicon nitride, or silicon oxynitride;
• and
• a second gate capping insulating layer disposed on the first gate capping insulating layer and filling the gate trench, the second gate capping insulating layer including silicon nitride,
• wherein a top surface of the third gate electrode is concave, and
• a side surface of the first gate capping insulating layer contacts the gate dielectric layer.