Vertical transistor device with source/drain regions comprising a twi-dimensional (2d) material and methods of making such verticaltransistor devices

A vertical transistor device, comprising:

• a bottom source/drain region comprising a first plurality of layers of two-dimensional (2D) material, wherein each of the first plurality of layers of 2D material has a respective periodic crystallographic pattern with a respective rotational orientation about a first reference axis of rotation relative to each adjacent layer of the first plurality of layers of 2D material;
• a top source/drain region comprising a second plurality of layers of two-dimensional (2D) material, wherein each of the second plurality of layers of 2D material has a respective periodic crystallographic pattern with a respective rotational orientation about a second reference axis of rotation relative to each adjacent layer of the second plurality of layers of 2D material and wherein, relative to a reference axis of rotation, the periodic crystallographic pattern of one of the layers of 2D material in the second plurality of layers of 2D material is rotated relative to the periodic crystallographic pattern of another of the layers of 2D material in the second plurality of layers of 2D material;
• a vertically oriented semiconductor structure positioned vertically between the bottom source/drain region and the top source/drain region, the vertically oriented semiconductor structure having a vertical height and an outer perimeter;
• and
• a gate structure positioned all around the outer perimeter of the vertically oriented semiconductor structure for at least a portion of the vertical height of the vertically oriented semiconductor structure.

A vertical transistor device, comprising:

• a bottom source/drain region comprising a first plurality of layers of two-dimensional (2D) material, wherein each of the first plurality of layers of 2D material has a respective periodic crystallographic pattern with a respective rotational orientation about a first reference axis of rotation relative to each adjacent layer of the first plurality of layers of 2D material;
• a top source/drain region comprising a second plurality of layers of two-dimensional (2D) material, wherein each of the second plurality of layers of 2D material has a respective periodic crystallographic pattern with a respective rotational orientation about a second reference axis of rotation relative to each adjacent layer of the second plurality of layers of 2D material;
• a vertically oriented semiconductor structure positioned vertically between the bottom source/drain region and the top source/drain region, the vertically oriented semiconductor structure having a vertical height and an outer perimeter, wherein a lowermost surface of the vertically oriented semiconductor structure is positioned on and in contact with an uppermost of the first plurality of layers of 2D material of the bottom source/drain region and an uppermost surface of the vertically oriented semiconductor structure is positioned on and in contact with a lowermost second plurality of layers of 2D material of the top source/drain region;
• and
• a gate structure positioned all around the outer perimeter of the vertically oriented semiconductor structure for at least a portion of the vertical height of the vertically oriented semiconductor structure.