Method for FinFET LDD Doping

A semiconductor device, comprising:

• a substrate;
• an isolation structure over the substrate;
• a fin over the substrate and the isolation structure;
• a gate structure engaging a first portion of the fin;
• first sidewall spacers over sidewalls of the gate structure and over a second portion of the fin;
• source/drain (S/D) features adjacent to the first sidewall spacers;
• and
• second sidewall spacers over the isolation structure and over sidewalls of a portion of the S/D features, wherein the second sidewall spacers include a dielectric material, and the second sidewall spacers and the second portion of the fin include a same dopant, wherein the second sidewall spacers contain the dopant at a higher concentration than the second portion of the fin does, wherein the first portion of the fin has a first height above a top surface of the isolation structure, the second sidewall spacers have a second height above the top surface of the isolation structure, and the second height is less than half of the first height.

A semiconductor device, comprising:

• a substrate;
• an isolation structure over the substrate;
• a fin over the substrate and the isolation structure;
• a gate structure engaging a first portion of the fin;
• first sidewall spacers over sidewalls of the gate structure and over a second portion of the fin;
• source/drain (S/D) features adjacent to the first sidewall spacers;
• and
• second sidewall spacers over the isolation structure and over sidewalls of a portion of the S/D features, wherein the second sidewall spacers include silicon nitride, and the second sidewall spacers and the second portion of the fin both include phosphorus, wherein the second sidewall spacers contain phosphorus at a higher concentration than the second portion of the fin does.