US 2021/0242166 A1 · LOW TEMPERATURE HYBRID BONDING STRUCTURES AND MANUFACTURING METHOD THEREOF

Abstract

Devices and techniques including process steps make use of recesses in conductive interconnect structures to form reliable low temperature metallic bonds. A fill layer is deposited into the recesses prior to bonding. The fill layer is composed of noble metal (such as copper) and active metal (such as Zn). Then the fill metal layer is turned into a metal alloy after annealing. A dealloying is performed to the metal alloy to remove the active metal from the metal alloy while the noble metal remains to self-assemble into porous (nanoporous) structure metal. First conductive interconnect structures are bonded at ambient temperatures to second metallic interconnect structures using dielectric-to-dielectric direct bonding techniques, with the fill nanoporous metal layer in the recesses in one of the first and second interconnect structures. After the following batch annealing, the fill nanoporous metal layer turns into pure bulk metal same as conductive interconnect structures due to the heat expansion of conductive interconnect structures and nanoporous metal densification.

Claims15

Dependent claims

A method of bonding a pair of semiconductor structures together, the method comprising:

providing a pair of semiconductor structures comprising corresponding dielectric layers and corresponding copper features arranged in the dielectric layers, wherein the pair of semiconductor structures comprises a first semiconductor structure and a second semiconductor structure;
arranging a precursor alloy on the copper feature of the first semiconductor structure, wherein the precursor alloy comprising copper and an active metal;
performing a vacuum thermal dealloying on the precursor alloy to remove the active metal from the precursor alloy so that the remnants of the precursor alloy self-organize into a porous copper fill layer;
arranging the porous copper fill layer between the two copper features and bonding the two dielectric layers of the two semiconductor structures together;
and
performing an anneal to the two semiconductor structures to turn the two copper features and the porous copper fill layer into a bulk-like copper feature.

3 more elements

Dependencies are inferred from the claim text.

Low temperature hybrid bonding structures and manufacturing method thereof

Life of this patent

Low temperature hybrid bonding structures and manufacturing method thereof

Life of this patent

Abstract

Claims15