Resist structure for forming bumps

A method for fabricating a semiconductor device, the method comprising:

• forming a plurality of conductive pads on a substrate;
• patterning a lower resist to form a plurality of lower cavities, wherein each of the plurality of lower cavities is located above a corresponding one of the plurality of conductive pads;
• patterning an upper resist to form an upper cavity overlapping the plurality of lower cavities, wherein the upper cavity has a plurality of cavity regions, wherein each of the cavity regions is located above a corresponding one of the plurality of lower cavities, and each cavity region has a diameter larger than a diameter of the corresponding one of the plurality of lower cavities, and a connecting region between adjacent cavity regions;
• forming a conductive pillar in each of the plurality of lower cavities;
• filling conductive material in the plurality of cavity regions and connecting regions to form a plurality of bumps, each of the plurality of bumps being located on a corresponding one of the plurality of conductive pillars;
• and
• connecting the plurality of bumps to a circuit board by flip-chip bonding.

A resist structure comprising:

• a plurality of conductive pads on a substrate;
• a lower resist having a plurality of lower cavities, the lower resist being on the substrate, and each of the plurality of lower cavities being located above a corresponding one of the plurality of conductive pads;
• and
• an upper resist on the lower resist, wherein the upper resist has an upper cavity with a plurality of cavity regions, each of the plurality of cavity regions overlapping an associated lower cavity, and connecting regions between adjacent cavity regions, wherein the cavity regions have a diameter larger than a diameter of each of the plurality of lower cavities.

A semiconductor device comprising:

• a plurality of conductive pads on a substrate;
• a lower resist having a plurality of lower cavities, wherein each of the plurality of lower cavities overlaps a corresponding one of the plurality of conductive pads;
• an upper resist on the lower resist, wherein the upper resist has an upper cavity with a plurality of cavity regions, each of the plurality of cavity regions overlapping an associated lower cavity, and connecting regions between adjacent cavity regions, wherein the cavity regions have a diameter larger than a diameter of the corresponding one of the plurality of lower cavities;
• a plurality of conductive pillars, each of the plurality of conductive pillars being located in the corresponding one of the plurality of lower cavities;
• a plurality of bumps of conductive material in the plurality of cavity regions and connecting regions, each of the plurality of bumps being located on a corresponding one of the plurality of conductive pillars;
• and
• a circuit board to which the plurality of bumps are connected by flip-chip bonding.

An electronic apparatus comprising:

• a semiconductor device;
• and
• a signal processor configured to process a signal outputted from the semiconductor device, wherein
• the semiconductor device comprises:
• a plurality of conductive pads on a substrate;
• a lower resist having a plurality of lower cavities, wherein each of the plurality of lower cavities overlaps a corresponding one of the plurality of conductive pads;
• an upper resist on the lower resist, wherein the upper resist has an upper cavity with a plurality of cavity regions, each of the plurality of cavity regions overlapping an associated lower cavity, and connecting regions between adjacent cavity regions, wherein the cavity regions have a diameter larger than a diameter of the corresponding one of the plurality of lower cavities;
• a plurality of conductive pillars, each of the plurality of conductive pillars being located in the corresponding one of the plurality of lower cavities;
• a plurality of bumps of conductive material in the plurality of cavity regions and connecting regions, each of the plurality of bumps being located on a corresponding one of the plurality of conductive pillars;
• and
• a circuit board to which the plurality of bumps are connected by flip-chip bonding.