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US 2021/0241822 A1Published application
Memory device having non-uniform refresh
AssigneeRambus Inc.
InventorThomas Vogelsang
Life of this patent
Estimating the term…
Abstract
An integrated circuit memory device includes an array of storage cells configured into multiple banks. Each bank includes multiple segments. Register storage stores per-segment values representing per-segment refresh parameters. Refresh logic refreshes each segment in accordance with the corresponding per-segment value.
Claims20
An integrated circuit (IC) memory device comprising:
- an array of storage cells configured into multiple banks, each bank including multiple segments;
- register storage to store per-segment values representing per-segment refresh rates;
- and
- refresh logic to refresh each segment in accordance with the corresponding per-segment value.
1 more element
A method of operation in a memory device, the method comprising:
- storing data in an array of storage cells including multiple banks, each bank including multiple segments;
- receiving per-segment values representing per-segment refresh rates;
- loading the per-segment values in register storage;
- and
- refreshing each segment in accordance with the corresponding per-segment value.
2 more elements
An integrated circuit (IC) dynamic random access memory (DRAM) device comprising:
- an array of storage cells configured into multiple banks, each bank including at least a first segment and a second segment;
- a mode register to store a first value representing a first refresh rate for refreshing the first segment, the mode register to store a second value representing a second refresh rate for refreshing the second segment;
- and
- refresh logic to refresh each segment in accordance with the corresponding per-segment value.
1 more element
Dependencies are inferred from the claim text.