Display device
AssigneeSharp Kabushiki Kaisha
InventorsYOHEI TAKEUCHI, AKIRA TAGAWA, YASUAKI IWASE, JUN NISHIMURA
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AssigneeSharp Kabushiki Kaisha
InventorsYOHEI TAKEUCHI, AKIRA TAGAWA, YASUAKI IWASE, JUN NISHIMURA
Estimating the term…
In a display device that adopts an SSD scheme, a demultiplexer circuit has provided for each source bus line, a compensating transistor whose first conduction terminal is connected to the source bus line and whose second conducting terminal is maintained in a floating state. In such a configuration, for example, at the same timing as a connection control transistor changes from an on state to an off state due to a change from a high level to a low level of a control signal that is supplied to a control terminal of the connection control transistor, a control signal that is supplied to a control terminal of the compensating transistor changes from the low level to the high level.
A display device including a plurality of video signal lines, a plurality of scanning signal lines that intersect the plurality of video signal lines, a plurality of pixel forming sections disposed in correspondence with intersections of the plurality of video signal lines and the plurality of scanning signal lines, respectively, and a scanning signal line driving circuit that drives the plurality of scanning signal lines, the display device comprising:
Dependencies are inferred from the claim text.