Resistive and digital processing cores

A method comprising:

• during performance of a dynamic data process:
• selecting, by a controller, a first processing core comprising a resistive memory array to perform an analog computation;
• in response to a first condition, programming, by the controller, first values into a digital memory of a digital processing core to perform a first computation;
• and
• in response to a second condition, programming, by the controller, second values different from the first values into the digital memory of the digital processing core to perform a second computation different from the first computation.

A system comprising:

• a plurality of integrated circuit devices;
• a communication interconnect that interconnects the plurality of integrated circuit devices,
• wherein a first integrated circuit device of the plurality of integrated circuit devices comprises:
• a first processing core comprising a resistive memory array to perform an analog computation;
• a digital processing core comprising a digital memory programmable with different values to perform different computations responsive to respective different conditions;
• and
• a controller to selectively apply input data to the first processing core and the digital processing core.