Integrated circuit and method of forming the same

A method of forming an integrated circuit, the method comprising:

• placing, by a processor, a first standard cell layout design of the integrated circuit on a layout design, the first standard cell layout design having a first height, the placing the first standard cell layout design includes:
• placing a first set of pin layout patterns on a first layout level and over a first set of gridlines, the first set of pin layout patterns extending in a first direction, and having a first width in a second direction different from the first direction;
• placing a second standard cell layout design of the integrated circuit adjacent to the first standard cell layout design, the second standard cell layout design having a second height different from the first height, the first height and the second height being in the second direction, the placing the second standard cell layout design includes:
• placing a second set of pin layout patterns on the first layout level and over a second set of gridlines, the second set of pin layout patterns extending in the first direction, and having a second width in the second direction, the second width being different from the first width;
• and
• manufacturing the integrated circuit based on at least the first standard cell layout design or the second standard cell layout design.

An integrated circuit comprising:

• a first region of the integrated circuit comprising:
• a first set of active regions in a substrate, the first set of active regions extending in a first direction and having a first width in a second direction different from the first direction;
• and
• a first set of pins extending in the first direction, being over the first set of active regions, and having a second width in the second direction,
• wherein the first region has a first height in the second direction;
• and
• a second region of the integrated circuit adjacent to the first region, the second region comprising:
• a second set of active regions in the substrate, the second set of active regions extending in the first direction and having a third width in the second direction different from the first width;
• and
• a second set of pins extending in the first direction, being over the second set of active regions, and having a fourth width in the second direction different from the second width,
• wherein the second region has a second height in the second direction different from the first height, and
• the first set of pins and the second set of pins are in a first metal layer of the integrated circuit.