Delay-based side-channel analysis for trojan detection
AssigneeUniversity of Florida Research Foundation, Inc.
InventorsPRABHAT KUMAR MISHRA, YANGDI LYU
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Abstract
The present disclosure describes various embodiments of systems, apparatuses, and methods for detecting a Trojan inserted integrated circuit design using delay-based side channel analysis. In one such embodiment, an automated test generation algorithm produces test patterns that are likely to activate trigger conditions and change critical paths of an integrated circuit design.
Claims20
A method of detecting a Trojan inserted integrated circuit design comprising:
- applying test patterns as inputs to a golden integrated circuit device;
- measuring a propagation delay of a critical path within the golden integrated circuit device;
- applying the test patterns as inputs to a test integrated circuit device;
- measuring a propagation delay of a critical path of the test integrated circuit device;
- comparing the propagation delay of the test integrated circuit device with the propagation delay of the golden integrated circuit device;
- and
- determining the test integrated circuit device to be a Trojan inserted integrated circuit device when the propagation delay of the test integrated circuit device exceeds the propagation delay of the golden integrated circuit device by a threshold value.
An apparatus for detecting a Trojan inserted integrated circuit design comprising:
- a computer having memory and a processor that is configured to:
- receive an output signal from an integrated circuit device;
- apply test patterns as inputs to a golden integrated circuit device;
- receive an output signal from the golden integrated circuit device in response to the applied test patterns;
- measure a propagation delay of a critical path within the golden integrated circuit device;
- store the propagation delay for the golden integrated circuit device in a data store;
- apply the test patterns as inputs to a test integrated circuit device;
- receive an output signal from the test integrated circuit device in response to the applied test patterns;
- measure a propagation delay of a critical path of the test integrated circuit device;
- compare the propagation delay of the test integrated circuit device with the propagation delay of the golden integrated circuit device from the data store;
- and
- determine the test integrated circuit device to be a Trojan inserted integrated circuit device when the propagation delay of the test integrated circuit device exceeds the propagation delay of the golden integrated circuit device by a threshold value.
A non-transitory computer readable storage medium having instructions stored thereon that, in response to execution by a computing device, cause the computing device to perform operations comprising:
- applying test patterns as inputs to a golden integrated circuit device;
- measuring a propagation delay of a critical path within the golden integrated circuit device;
- applying the test patterns as inputs to a test integrated circuit device;
- measuring a propagation delay of a critical path of the test integrated circuit device;
- comparing the propagation delay of the test integrated circuit device with the propagation delay of the golden integrated circuit device;
- and
- determining the test integrated circuit device to be a Trojan inserted integrated circuit device when the propagation delay of the test integrated circuit device exceeds the propagation delay of the golden integrated circuit device by a threshold value.
Dependencies are inferred from the claim text.