Source ordering in device interconnects

A method comprising:

• receiving a request to initiate a memory write transaction on a link implementing a load-store input/output (I/O)-based protocol;
• constructing a memory write request transaction layer packet (TLP) for the memory write transaction, wherein fields of the memory write request TLP indicate a non-default traffic class for the TLP, that a completion is required in response to the memory write transaction, and a stream identifier associated with the memory write transaction;
• transmitting the memory write request TLP over the link;
• and
• receiving a completion TLP over the link, the completion TLP indicating a completion for the memory write request TLP.

A system comprising:

• a processor;
• a first device;
• and
• a second device;
• wherein the processor, first device, and second device are coupled to one another via a load-store input/output (I/O) protocol-based interconnect, and each includes protocol circuitry to:
• construct memory write request transaction layer packets (TLPs) for memory write transactions to be performed on the interconnect, wherein fields of the memory write request TLPs indicate a non-default traffic class for the TLP, that a completion is required in response to the memory write transaction, and a stream identifier associated with the memory write transaction;
• and
• process completion TLPs received over the interconnect indicating completions for the memory write request TLPs.