Secure memory translations
AssigneeArm Limited
InventorsTessil THOMAS, Jan-Peter LARSSON
Life of this patent
Estimating the term…
Loading patent…
AssigneeArm Limited
InventorsTessil THOMAS, Jan-Peter LARSSON
Estimating the term…
An apparatus is provided, connectable to a memory and one or more peripherals. The apparatus includes translation request circuitry to receive a translation request from one of the peripherals to translate an input address within an input domain to an output address within an output domain. Signing circuitry generates a signature of at least part of the output address using a private key. Translation response circuitry responds to the translation request by transmitting to the one of the peripherals a translation response, including the output address and the signature. Gateway circuitry receives access requests to the memory. Each of the access requests comprises a desired memory address in the output domain and a signature of the desired memory address. The gateway performs validation of the signature of the desired memory address using the private key and in response to the validation of a given access request failing, performs an error action.
An apparatus, connectable to a memory and one or more peripherals, the apparatus comprising:
A method comprising:
An apparatus, connectable to a memory and one or more peripherals, the apparatus comprising:
Dependencies are inferred from the claim text.