Using multi-tiered cache to satisfy input/output requests

A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable and/or executable by a processor to cause the processor to:

• receive, by the processor, an input/output (I/O) request;
• determine, by the processor, whether the I/O request includes a bypass indication;
• in response to determining that the I/O request does not include a bypass indication, satisfy, by the processor, the I/O request using a primary cache, wherein the primary cache is coupled to a secondary cache and a data storage device, wherein the secondary cache includes storage class memory;
• determine, by the processor, whether data associated with the I/O request has been updated as a result of satisfying the I/O request;
• in response to determining that the data associated with the I/O request has been updated as a result of satisfying the I/O request:
• destage, by the processor, the updated data from the primary cache to the data storage device,
• copy, by the processor, the updated data to the secondary cache, and
• demote, by the processor, the updated data from the primary cache;
• and
• in response to determining that the data associated with the I/O request has not been updated as a result of satisfying the I/O request:
• copy, by the processor, the data associated with the I/O request to the secondary cache, and
• demote, by the processor, the data associated with the I/O request from the primary cache.

A system, comprising:

• a processor, wherein the processor is coupled to a primary cache and a secondary cache, wherein the secondary cache includes a first tier of storage class memory and a second tier of storage class memory;
• and
• logic integrated with the processor, executable by the processor, or integrated with and executable by the processor, the logic being configured to:
• receive, by the processor, an input/output (I/O) request;
• determine, by the processor, whether the I/O request includes a bypass indication;
• in response to determining that the I/O request does not include a bypass indication, satisfy, by the processor, the I/O request using the primary cache, wherein the primary cache is coupled to the secondary cache and a data storage device;
• determine, by the processor, whether data associated with the I/O request has been updated as a result of satisfying the I/O request;
• in response to determining that the data associated with the I/O request has been updated as a result of satisfying the I/O request:
• destage, by the processor, the updated data from the primary cache to the data storage device,
• copy, by the processor, the updated data to the secondary cache, and
• demote, by the processor, the updated data from the primary cache;
• and
• in response to determining that the data associated with the I/O request has not been updated as a result of satisfying the I/O request:
• copy, by the processor, the data associated with the I/O request to the secondary cache, and
• demote, by the processor, the data associated with the I/O request from the primary cache.

A system, comprising:

• a processor, wherein the processor is coupled to:
• a primary cache, a secondary cache, and a data storage device, wherein the primary cache includes dynamic random access memory, wherein the secondary cache includes a first tier of storage class memory and a second tier of storage class memory;
• and
• logic integrated with the processor, executable by the processor, or integrated with and executable by the processor, the logic being configured to:
• receive, by the processor, an input/output (I/O) request;
• determine, by the processor, whether the I/O request includes a bypass indication;
• in response to determining that the I/O request includes a bypass indication, satisfying the I/O request using the secondary cache;
• determining whether data associated with the I/O request has been updated as a result of satisfying the I/O request;
• and
• in response to determining that the data associated with the I/O request has been updated as a result of satisfying the I/O request, destaging the updated data from the secondary cache to the data storage device.

A computer-implemented method, comprising:

• receiving an input/output (I/O) request;
• determining whether the I/O request includes a bypass indication;
• in response to determining that the I/O request includes a bypass indication, satisfying the I/O request using a secondary cache, wherein the secondary cache is coupled to a primary cache and a data storage device, wherein the primary cache includes dynamic random access memory, wherein the secondary cache includes a first tier of storage class memory and a second tier of storage class memory;
• determining whether data associated with the I/O request has been updated as a result of satisfying the I/O request;
• and
• in response to determining that the data associated with the I/O request has been updated as a result of satisfying the I/O request, destaging the updated data from the secondary cache to the data storage device.