Method, apparatus, and electronic device for improving cpu performance

A computer-implemented method comprising:

• at each of a plurality of CPU components of a CPU:
• enabling threads awaiting execution on the CPU component to compete for a respective mutex of the CPU component, wherein each CPU component is operable to execute one thread at any given time;
• identifying a plurality of threads that have each obtained the respective mutex;
• enabling the plurality of threads that have each obtained the respective mutex of a CPU component to compete for a spin lock of the CPU;
• identifying, from the plurality of threads, a target thread holding a mutex of a CPU component that has also obtained the spin lock of the CPU;
• and
• executing, at the CPU, a critical section corresponding to the target thread that has obtained the spin lock while remaining threads that have not obtained the respective mutexes are sleeping.

A computer-implemented system, comprising:

• one or more computers;
• and
• one or more computer memory devices interoperably coupled with the one or more computers and having tangible, non-transitory, machine-readable media storing one or more instructions that, when executed by the one or more computers, perform operations comprising:
• at each of a plurality of CPU components of a CPU:
• enabling threads awaiting execution on the CPU component to compete for a respective mutex of the CPU component, wherein each CPU component is operable to execute one thread at any given time;
• identifying a plurality of threads that have each obtained the respective mutex;
• enabling the plurality of threads that have each obtained the respective mutex of a CPU component to compete for a spin lock of the CPU;
• identifying, from the plurality of threads, a target thread holding a mutex of a CPU component that has also obtained the spin lock of the CPU;
• and
• executing, at the CPU, a critical section corresponding to the target thread that has obtained the spin lock while remaining threads that have not obtained the respective mutexes are sleeping.

A non-transitory, computer-readable medium storing one or more instructions executable by a computer system to perform operations comprising:

• at each of a plurality of CPU components of a CPU:
• enabling threads awaiting execution on the CPU component to compete for a respective mutex of the CPU component, wherein each CPU component is operable to execute one thread at any given time;
• identifying a plurality of threads that have each obtained the respective mutex;
• enabling the plurality of threads that have each obtained the respective mutex of a CPU component to compete for a spin lock of the CPU;
• identifying, from the plurality of threads, a target thread holding a mutex of a CPU component that has also obtained the spin lock of the CPU;
• and
• executing, at the CPU, a critical section corresponding to the target thread that has obtained the spin lock while remaining threads that have not obtained the respective mutexes are sleeping.