Indirect Branch Predictor for Dynamic Indirect Branches

A processor comprising:

• a fetch address generation circuit configured to generate fetch addresses to fetch instructions from an instruction cache;
• and
• an indirect branch predictor coupled to the fetch address generation circuit, wherein the indirect branch predictor comprises at least one memory configured to store target addresses of previously executed indirect branch instructions, and wherein the indirect branch predictor comprises a first register that is programmable with data to identify a specific indirect branch instruction, and wherein the indirect branch predictor is configured to generate an index into the at least one memory based on a first address to generate a prediction for a first indirect branch instruction, wherein the indirect branch predictor is configured to select the first address from a plurality of addresses, and wherein the indirect branch predictor is configured to select the first address based on whether or not the first indirect branch instruction is the specific indirect branch instruction.

A method comprising:

• receiving a fetch address corresponding to a first indirect branch instruction to an indirect branch predictor to predict a first target address of the first indirect branch instruction;
• and
• indexing one or more memories in the indirect branch predictor to determine the first target address to predict for the first indirect branch instruction, wherein the indexing is modified from the indexing used for other indirect branch instructions responsive to detecting that the first indirect branch instruction is a specific indirect branch instruction.