Computation method and apparatus exploiting weight sparsity

A computation method exploiting weight sparsity, adapted for a processor to perform multiply-and-accumulate (MAC) operations on a memory having a crossbar architecture, wherein the memory comprises a plurality of input lines and a plurality of output lines crossing each other, a plurality of cells respectively disposed at intersections of the input lines and the output lines, and a plurality of sense amplifiers respectively connected to the output lines, the method comprising:

• mapping a plurality of weights to the cells of each of a plurality of operation units (OUs) in the memory;
• compressing the rows of the cells of each OU by removing at least one row of the cells each mapped with a weight of 0, and encoding an index including values each indicating a distance between every two rows of the cells including at least one cell mapped with a non-zero weight for each OU;
• and
• inputting a plurality of inputs to the input lines corresponding to the rows of each OU excluding the rows of the cells with the weight of 0 according to the index and sensing a plurality of multiply-and-accumulate results from the output lines by the sense amplifiers corresponding to the OU to compute a computation result.