Electronic circuit for voltage regulation

Abstract

An electronic circuit for voltage regulation is disclosed, the circuit generally includes a low-dropout (LDO) voltage regulator function block, including a primary feedback loop, and an output voltage stabilizer block connected to the LDO voltage regulator function block outside the primary feedback loop, wherein the output voltage stabilizer block includes a plurality of peak voltage suppression circuits and a plurality of dip voltage suppression circuits. In some embodiments, the output voltage stabilizer block is set at low bias current to minimize current consumption at normal condition. Other useful features and advantages of an electronic circuit for voltage regulation are disclosed.

Dependencies are inferred from the claim text.