Phase-change memory and method of forming same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJau-Yi Wu
Life of this patent
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Abstract
A device and a method of forming the same are provided. The device includes a substrate, a first dielectric layer over the substrate, a bottom electrode extending through the first dielectric layer, a first buffer layer over the bottom electrode, a phase-change layer over the first buffer layer, a top electrode over the phase-change layer, and a second dielectric layer over the first dielectric layer. The second dielectric layer surrounds the phase-change layer and the top electrode. A width of the top electrode is greater than a width of the bottom electrode.
Claims20
A device comprising:
- a substrate;
- a first dielectric layer over the substrate;
- a bottom electrode extending through the first dielectric layer;
- a first buffer layer over the bottom electrode;
- a phase-change layer over the first buffer layer;
- a top electrode over the phase-change layer, wherein a width of the top electrode is greater than a width of the bottom electrode;
- and
- a second dielectric layer over the first dielectric layer, the second dielectric layer surrounding the phase-change layer and the top electrode.
A device comprising:
- a substrate;
- a first dielectric layer over the substrate;
- a conductive line in the first dielectric layer;
- a second dielectric layer over the conductive line and the first dielectric layer;
- a bottom electrode within the second dielectric layer, the bottom electrode being electrically connected to the conductive line, the bottom electrode having a first width;
- a first buffer layer over the bottom electrode, the first buffer layer having a second width;
- a phase-change layer over the first buffer layer, the phase-change layer having a third width greater than the first width;
- a top electrode over the phase-change layer, the top electrode having the third width;
- a third dielectric layer over the second dielectric layer, the third dielectric layer extending along sidewalls of the phase-change layer and sidewalls of the top electrode;
- a fourth dielectric layer over the third dielectric layer and the top electrode;
- and
- a conductive via within the fourth dielectric layer, the conductive via being electrically connected to the top electrode.
A method comprising:
- forming a first dielectric layer over a substrate;
- forming a first conductive feature in the first dielectric layer;
- forming a second dielectric layer over the first dielectric layer and the first conductive feature;
- forming an opening in the second dielectric layer, the opening exposing a topmost surface of the first conductive feature;
- filling the opening with a first conductive material to form a bottom electrode in the second dielectric layer;
- depositing a phase-change material over the second dielectric layer and the bottom electrode;
- depositing a first buffer material over the phase-change material;
- depositing a second conductive material over the first buffer material;
- performing a patterning process to remove a portion of the phase-change material, a portion of the first buffer material and a portion of the second conductive material and to expose a topmost surface of the second dielectric layer, a remaining portion of the phase-change material forming a phase-change layer, a remaining portion of the first buffer material forming a first buffer layer, a remaining portion of the second conductive material forming a top electrode;
- and
- forming a third dielectric layer over the second dielectric layer, the third dielectric layer surrounding the first buffer layer, the phase-change layer and the top electrode.
Dependencies are inferred from the claim text.