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US 2021/0202444 A1Published application
Chip package structure
AssigneePowertech Technology Inc.
InventorsChih-Yen Su, Chun-Te Lin
Life of this patent
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Abstract
A chip package structure including a circuit board, a first die, a spacer, and a second die. The first die is disposed on the circuit board, and the spacer is disposed on the circuit board, in which the spacer includes a spacer part and at least one via structure penetrating through the spacer part. The second die is disposed on the first die and the spacer, and the second die is electrically connected to the circuit board through the spacer.
Claims20
A chip package structure, comprising:
- a circuit board;
- a first die disposed on the circuit board;
- a spacer disposed on the circuit board, wherein the spacer comprises a spacer part and at least one first via structure, and the at least one first via structure penetrates through the spacer part;
- and
- a second die disposed on the first die and the spacer, and the second die being electrically connected to the circuit board through the spacer.
2 more elements
Dependencies are inferred from the claim text.