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US 2021/0175902 A1Published application
Variable read error code correction
AssigneeMicron Technology, Inc.
InventorsXiangang Luo, Ting Luo
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Abstract
Devices and techniques for variable read throughput control in a storage device are described herein. Bits from can be received for a read that is one of several types assigned to reads. A low-density parity-check (LDPC) iteration maximum can be set based on the type. LDPC iterations can be performed up to the LDPC iteration maximum and a read failure signaled in response to the LDPC iterations reaching the LDPC iteration maximum.
Claims20
A device for variable read error code correction (ECC), the controller comprising:
- a hardware interface to receive bits from a memory in response to a read that is one type of several types of read;
- and
- processing circuitry configured to perform a low-density parity check (LDPC) on the bits based on the type by:
- performing a number of LDPC decodes that is less than a total number of possible LDPC decodes;
- and
- signaling a failure for the read based on reaching the number of LDPC decodes.
3 more elements
Dependencies are inferred from the claim text.