Nanowire Stack GAA Device with Inner Spacer and Methods for Producing the Same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsI-Sheng Chen, Chao-Ching Cheng, Tzu-Chiang Chen, Carlos H. Diaz
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Abstract
A nanowire FET device includes a vertical stack of nanowire strips configured as the semiconductor body. One or more of the top nanowire strips are receded and are shorter than the rest of the nanowire strips stacked lower. Inner spacers are uniformly formed adjacent to the receded nanowire strips and the rest of the nanowire strips. Source/drain structures are formed outside the inner spacers and a gate structure is formed inside the inner spacers, which wraps around the nanowire strips.
Claims20
A method of forming a semiconductor device, the method comprising:
- forming a first fin structure over a substrate, the first fin structure including alternating layers of a first semiconductor material layer and a second semiconductor material layer;
- forming a gate structure over the first fin structure;
- forming a receded strip by removing portions of a topmost layer of the second semiconductor material layer on opposing sides of the gate structure;
- forming receded sacrificial strips by removing portions of the first semiconductor material layers on opposing sides of the gate structure, the receded sacrificial strips each including recessed edge surfaces;
- forming an inner spacer adjacent to the recessed edge surfaces of the receded sacrificial strips;
- and
- epitaxially growing a source/drain structure adjacent to the inner spacer and remaining portions of the alternating layers of the first semiconductor material layer and the second semiconductor material layer.
A method of forming a semiconductor device, the method comprising:
- forming a first fin structure over a substrate, the first fin structure including alternating layers of a first semiconductor material and a second semiconductor material;
- forming a gate structure over the first fin structure;
- forming a first receded strip by removing portions of a topmost layer of the second semiconductor material on opposing sides of the gate structure;
- forming receded sacrificial strips by removing portions of the first semiconductor material on opposing sides of the gate structure, the receded sacrificial strips each including recessed edge surfaces;
- forming an inner spacer layer adjacent to the recessed edge surfaces of the receded sacrificial strips, the inner spacer layer extending over upper surfaces of at least a first layer of the second semiconductor material, the first layer being below the topmost layer of the second semiconductor material;
- forming etch stop portions over the inner spacer layer adjacent the recessed edge surfaces of the receded sacrificial strips, exposed portions of the inner spacer layer extending away from the etch stop portions;
- removing the exposed portions of the inner spacer layer, remaining portions of the inner spacer layer forming inner spacers;
- and
- forming a source/drain structure adjacent to the inner spacer and the layers of the second semiconductor material.
A method of forming a semiconductor device, the method comprising:
- forming a first fin structure over a substrate, the first fin structure including alternating layers of a first semiconductor material and a second semiconductor material;
- forming a gate structure over the first fin structure;
- forming receded sacrificial strips by removing portions of the first semiconductor material on opposing sides of the gate structure, the receded sacrificial strips each including recessed edge surfaces;
- forming an inner spacer layer adjacent to the recessed edge surfaces of the receded sacrificial strips and over the layers of the second semiconductor material;
- forming etch stop portions over the inner spacer layer adjacent the recessed edge surfaces of the receded sacrificial strips;
- removing exposed portions of the inner spacer layer, remaining portions of the inner spacer layer forming inner spacers adjacent the recessed edge surfaces of the receded sacrificial strips;
- and
- forming a source/drain structure adjacent to the inner spacer and the layers of the second semiconductor material.
Dependencies are inferred from the claim text.