Semiconductor device
AssigneeSamsung Electronics Co., Ltd.
InventorsYoo-cheol SHIN, Young-woo PARK, Jae-duk LEE
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Abstract
A semiconductor device includes a peripheral circuit region on a substrate, a polysilicon layer on the peripheral circuit region, a memory cell array region on the polysilicon layer and overlapping the peripheral circuit region, the peripheral circuit region being under the memory cell array region, an upper interconnection layer on the memory cell array region, and a vertical contact through the memory cell array region and the polysilicon layer, the vertical contact connecting the upper interconnection layer to the peripheral circuit region.
Claims19
A semiconductor device comprising:
- a first substrate including a first region and a second region;
- at least one first insulating layer disposed on the first substrate;
- a second insulating layer disposed on the at least one first insulating layer;
- a first lower interconnection structure disposed in the at least one first insulating layer and disposed on the first region of the first substrate;
- a second lower interconnection structure disposed in the at least one first insulating layer and disposed on the second region of the first substrate;
- a second substrate disposed on the at least one first insulating layer, and disposed on or above the first lower interconnection structure;
- a memory cell array disposed on the second substrate;
- a first vertical contact penetrating through the memory cell array and the second substrate, and contacting the first lower interconnection structure;
- a second vertical contact penetrating through the second insulating layer and contacting the second lower interconnection structure;
- a channel layer penetrating through the memory cell array, and directly contacting an upper surface of the second substrate;
- and
- an upper interconnection layer electrically connected to the first lower interconnection structure via the first vertical contact.
A semiconductor device comprising:
- a first substrate including a first region and a second region;
- at least one first insulating layer disposed on the first substrate;
- a first lower interconnection structure disposed in the at least one first insulating layer and disposed on the first region of the first substrate;
- a second substrate disposed on the at least one first insulating layer, and disposed on or above the first lower interconnection structure;
- a memory cell array disposed on the second substrate;
- a first vertical contact penetrating through the memory cell array and the second substrate, and contacting the first lower interconnection structure;
- and
- a channel layer penetrating through the memory cell array, and directly contacting an upper surface of the second substrate,
- wherein the first vertical contact is directly above the first region of the first substrate.
A semiconductor device comprising:
- a first substrate including a first region and a second region;
- a first insulating layer disposed on the first substrate;
- a lower interconnection structure disposed in the first insulating layer and disposed on the first region of the first substrate;
- a second insulating layer disposed on the first insulating layer;
- a dummy interconnection structure disposed in the first insulating layer and disposed on the second region of the first substrate;
- a second substrate disposed on the first insulating layer, and disposed on or above the lower interconnection structure;
- a memory cell array disposed on the second substrate;
- a first vertical contact penetrating through the memory cell array and the second substrate, and contacting the lower interconnection structure;
- and
- a channel layer penetrating through the memory cell array, and directly contacting an upper surface of the second substrate,
- wherein the first vertical contact is directly above the first region of the first substrate.
Dependencies are inferred from the claim text.