Semiconductor memory device and method of manufacturing the same
AssigneeSK hynix Inc.
InventorNam Jae LEE
Life of this patent
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Abstract
A semiconductor memory device, and a method of manufacturing the same, includes: a gate stack structure including interlayer insulating layers and conductive patterns stacked in a first direction; a channel structure penetrating the gate stack structure; a peripheral contact plug spaced apart from the gate stack structure on a plane intersecting the channel structure, to the peripheral contact plug extending in the first direction; and a capacitor spaced apart from the gate stack structure and the peripheral contact plug on the plane, to the capacitor having an area wider than an area of the peripheral contact plug.
Claims17
A semiconductor memory device, comprising:
- a gate stack structure including interlayer insulating layers and conductive patterns stacked in a first direction;
- a channel structure penetrating the gate stack structure;
- a peripheral contact plug spaced apart from the gate stack structure on a plane intersecting the channel structure, the peripheral contact plug extending in the first direction;
- and
- a capacitor spaced apart from the gate stack structure and the peripheral contact plug on the plane, the capacitor having an area wider than an area of the peripheral contact plug,
- wherein the capacitor comprises:
- a first capacitor electrode including a groove;
- a dielectric layer on a surface of the groove;
- and
- a second capacitor electrode on the dielectric layer and filling the groove.
A semiconductor memory device, comprising:
- a lower conductive pattern;
- a vertical contact plug extending from the lower conductive pattern in a first direction;
- a first upper conductive pattern coupled to the vertical contact plug;
- a first capacitor coupled to the lower conductive pattern;
- a second capacitor coupled to the lower conductive pattern;
- and
- a second upper conductive pattern coupled to the first capacitor and the second capacitor,
- wherein each of the first capacitor and the second capacitor comprises:
- a first capacitor electrode including a horizontal component in contact with the lower conductive pattern and extending in parallel with the lower conductive pattern and a vertical component extending from the horizontal component in the first direction;
- a dielectric layer formed on the first capacitor electrode;
- and
- a second capacitor electrode formed on the dielectric layer and extending in parallel with the vertical component.
Dependencies are inferred from the claim text.