Error-Correcting Code-Assisted Memory Repair

A memory-testing circuit in a circuit configured to perform a test of a memory in the circuit, the memory comprising error-correcting code circuitry configured to detect and correct no more than a first preset number of error bits per memory word detected in the memory, the memory-testing circuit comprising:

• a test controller;
• and
• repair circuitry configured to allocate a spare row or row block in the memory for a defective row or row block in the memory, a defective row or row block being a row or row block in which a memory word has a number of error bits greater than a second preset number, the second preset number being equal to or smaller than the first preset number,
• wherein the test of the memory comprises:
• disabling the error-correcting code circuitry by the test controller,
• performing a pre-repair operation, the pre-repair operation comprising:
• determining whether the memory has one or more defective rows or row blocks, and allocating one or more spare rows or row blocks for the one or more defective rows or row blocks if the one or more spare rows or row blocks are available, and
• performing a post-repair operation, the post-repair operation comprising:
• determining whether the memory has one or more new defective rows or row blocks after the pre-repair operation, and allocating one or more new spare rows or row blocks for the one or more new defective rows or row blocks if the one or more new spare rows or row blocks are available.