Temperature and cycling dependent refresh operation for memory cells

An apparatus, comprising:

• a control circuit configured to connect to a set of memory cells, the set of memory cells are arranged in NAND strings, each NAND string comprising a plurality of memory cells, each memory cell of the plurality of memory cells connected to a respective word line of a set of word lines, and each NAND string comprising a channel, the control circuit is also configured to connect to a plurality of pass transistors, each pass transistor of the plurality of pass transistors is connected to a respective word line of the set of word lines and to a word line voltage driver, the control circuit is also configured to connect to a temperature-sensing circuit, the temperature-sensing circuit is configured to provide an indication of temperature, and the control circuit is further configured to:
• determine that a number of program-erase cycles for the set of memory cells is above a threshold number;
• determine that the temperature exceeds a first threshold temperature;
• determine that a condition is met to perform a voltage refresh operation for the set of word lines based on the determining that the number of program-erase cycles is above the threshold number and the determining that the temperature exceeds the first threshold temperature;
• and
• based on the determining that the condition is met, begin counting an elapsed time and perform the voltage refresh operation for the set of word lines when the elapsed time reaches an allowed discharge time, wherein to perform the voltage refresh operation, the control circuit is configured to apply a turn on voltage to the plurality of pass transistors while the word line voltage driver applies a voltage pulse to the set of word lines, and to subsequently apply a turn off voltage to the plurality of pass transistors to float voltages of the set of word lines.