Rram circuit and method

A memory circuit comprising:

• a bias voltage generator comprising:
• a current source configured to output a first current at a first node;
• a first resistive device configured to generate, based on the first current, a first voltage at the first node and a second voltage at a second node;
• a first amplifier configured to output an activation voltage based on the second voltage;
• and
• a first transistor coupled between the first and second nodes and configured to generate a voltage difference responsive to the activation voltage;
• a drive circuit coupled to the first node;
• and
• an array of resistive random-access memory (RRAM) devices coupled to the drive circuit and comprising a plurality of signal lines, wherein each signal line of the plurality of signal lines is configured to receive the activation voltage.

A method of performing a write operation on a resistive random-access memory (RRAM) device, the method comprising:

• generating an activation voltage based on a resistance value of a resistive device;
• conducting a first current in a first current path to generate a first voltage difference based on the activation voltage;
• and
• applying the activation voltage to the RRAM device, thereby generating a second voltage difference in a selection transistor, the second voltage difference having a value corresponding to a value of the first voltage difference.