Multiplexer for memory

A method for operating a multiplexer controlling access to memory cells of a memory, the multiplexer comprising:

• a first string controlling access to source-lines of the memory, wherein the first string comprises a first set of two high voltage transistors and a first plurality of low voltage transistors;
• and
• a second string controlling access to bit-lines of the memory, wherein the second string comprises a second set of two high voltage transistors and a second plurality of low voltage transistors, the method comprising:
• applying voltages to the first string and the second string to conduct one or more operations on one or more memory cells of the memory, the one or more operations comprising at least one of:
• a read operation;
• a set/form operation;
• or
• a reset operation.

A multiplexer for controlling access to memory cells of a memory, the multiplexer comprising:

• one or more first strings controlling access to source-lines of the memory, wherein a first string of the one or more first strings comprises a first set of two high voltage transistors and a first plurality of low voltage transistors;
• and
• one or more second strings controlling access to bit-lines of the memory, wherein a second string of the one or more second strings comprises a second set of two high voltage transistors and a second plurality of low voltage transistors, wherein:
• the memory is a resistive random-access memory (RRAM);
• and
• at least one of the first string or the second string are configured to conduct a set/form operation, a reset operation or a read operation.