Method of Reducing Program Disturbance in Memory Device and Memory Device Utilizing Same

A memory device comprising:

• a bit line;
• a top select line;
• a top dummy word line;
• word lines;
• a top select cell comprising a first terminal coupled to the bit line, a control terminal coupled to the top select line, and a second terminal;
• a top dummy cell comprising a first terminal coupled to the second terminal of the top select cell, a control terminal coupled to the top dummy word line, and a second terminal;
• a string of memory cells, comprising a first terminal coupled to the second terminal of the top dummy cell, control terminals coupled to the respective word lines, and a second terminal;
• and
• a controller, coupled to the bit line, the top select line, the top dummy word line and the word lines, and prior to a program operation, configured to apply a pre-pulse voltage of a same magnitude to the top dummy word line, the top select line and the bit line while applying a low voltage to the word lines, and then sequentially apply the low voltage to the top dummy word line, the top select line and the bit line while applying the low voltage to the word lines;
• wherein the bit line is unselected during the program operation.