Data transfers between a memory and a distributed compute array
AssigneeXilinx, Inc.
InventorsXiaoqian Zhang, Ephrem C. Wu, David Berman
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AssigneeXilinx, Inc.
InventorsXiaoqian Zhang, Ephrem C. Wu, David Berman
Estimating the term…
An integrated circuit (IC) includes a plurality of dies. The IC includes a plurality of memory channel interfaces configured to communicate with a memory, wherein the plurality of memory channel interfaces are disposed within a first die of the plurality of dies. The IC may include a compute array distributed across the plurality of dies and a plurality of remote buffers distributed across the plurality of dies. The plurality of remote buffers are coupled to the plurality of memory channels and to the compute array. The IC further includes a controller configured to determine that each of the plurality of remote buffers has data stored therein and, in response, broadcast a read enable signal to each of the plurality of remote buffers initiating data transfers from the plurality of remote buffers to the compute array across the plurality of dies.
An integrated circuit including a plurality of dies, the integrated circuit comprising:
A controller disposed within an integrated circuit having a plurality of dies, the controller comprising:
A method, comprising:
Dependencies are inferred from the claim text.