Display panel and display device

A display panel, comprising:

• a base substrate;
• and
• a plurality of sub-pixels, a plurality of scanning signal lines and a plurality of data lines that are arranged on the base substrate;
• wherein:
• each row of sub-pixels corresponds to at least one of the scanning signal lines;
• each column of sub-pixels corresponds to at least one of the data lines;
• each of the sub-pixels comprises a pixel circuit;
• and
• the pixel circuit comprises:
• a data writing circuit;
• and
• a driving transistor;
• wherein the data writing circuit comprises:
• a first sub-data writing transistor;
• a second sub-data writing transistor;
• and
• a distributed capacitor;
• wherein:
• a gate of the first sub-data writing transistor and a gate of the second sub-data writing transistor are both electrically connected with a corresponding scanning signal line;
• a first end of the first sub-data writing transistor is electrically connected with a corresponding data line;
• a second end of the first sub-data writing transistor is electrically connected with a first end of the second sub-data writing transistor;
• a second end of the second sub-data writing transistor is electrically connected with a gate of the driving transistor;
• and
• a first electrode of the distributed capacitor is electrically connected with the second end of the first sub-data writing transistor;
• and
• a second electrode of the distributed capacitor is electrically connected with a fixed voltage signal end;
• wherein:
• an active layer of the first sub-data writing transistor comprises:
• a first source sub-region;
• a first drain sub-region;
• and
• a first channel sub-region arranged between the first source sub-region and the first drain sub-region;
• an active layer of the second sub-data writing transistor comprises:
• a second source sub-region;
• a second drain sub-region;
• and
• a second channel sub-region arranged between the second source sub-region and the second drain sub-region;
• and
• the display panel further comprises:
• a conductive portion arranged in each of the sub-pixels;
• wherein:
• orthographic projections of at least one of the first drain sub-region and the second source sub-region on the base substrate are overlapped with an orthographic projection of the conductive portion on the base substrate;
• the conductive portion serves as the second electrode of the distributed capacitor, and at least one of the first drain sub-region and the second source sub-region overlapped with the conductive portion serve as the first electrode of the distributed capacitor;
• and
• the orthographic projection of the conductive portion on the base substrate is overlapped with an orthographic projection of the corresponding data line on the base substrate.