Timing control method and timing control circuit for display panel, driving device and display device

A timing control circuit for a display panel, a display region of the display panel being divided into a plurality of sub-display regions arranged along a first direction away from a source driving circuit and extending along a second direction intersecting the first direction, and each of the plurality of sub-display regions comprising at least one row of pixels, the timing control circuit comprising:

• an enable signal generation circuit configured to supply a data enable signal to the source driving circuit in respective display periods, such that the source driving circuit supplies a data signal to the plurality of sub-display regions under control of the data enable signal;
• wherein the data enable signal is switched between an active level and an inactive level;
• and the data enable signal has a plurality of time periods at an active level and in one-to-one correspondence with the plurality of sub-display regions of the display panel;
• the farther a distance from a sub-display region of the plurality of sub-display regions to the source driving circuit, the longer a time period, at an active level, of the data enable signal for controlling the source driving circuit to provide the data signal to the at least one row of pixels in the sub-display region is.