Memory data access apparatus and method thereof
AssigneeRealtek Semiconductor Corp.
InventorsYEN-JU LU, CHAO-WEI HUANG
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Abstract
The present disclosure provides a memory data access apparatus and method thereof. The memory data access apparatus includes a cache memory and a processing unit. The processing unit is configured to: execute a memory read instruction, wherein the memory read instruction includes a memory address; determine that access of the memory address in the cache memory is missed; determine that the memory address is within a memory address range, wherein the memory address range corresponds to a data access amount; and read data blocks corresponding to the data access amount from the memory address of a memory.
Claims20
A memory data access method, comprising:
- executing a memory read instruction, wherein the memory read instruction comprises a memory address;
- determining that access of the memory address in the cache memory is missed;
- determining that the memory address is within a memory address range, wherein the memory address range corresponds to a data access amount;
- and
- reading a data block corresponding to the data access amount from the memory address of a memory.
A memory data access apparatus, comprises:
- a cache memory;
- and
- a processing unit, electrically coupled to the cache memory, and configured to:
- execute a memory read instruction, wherein, the memory read instruction comprises a memory address;
- determine that the memory address cache miss in the cache memory read;
- determine that the memory address is within a memory address range, wherein, the memory address range corresponds to an data access amount;
- and
- read a data block corresponding to the data access amount from the memory address of a memory.
Dependencies are inferred from the claim text.