Instruction prefetching method, device and medium

An electronic device, comprising:

• at least one processor;
• and
• a memory, communicatively coupled to the at least one processor;
• wherein
• the memory stores instructions executable by the at least one processor, when the instructions are executed by the at least one processor, the at least one processor is caused to perform the instruction prefetching method, comprising:
• before a processor core fetches a required instruction from a target buffer corresponding to the processor core, precompiling instructions in the target buffer;
• and
• in response to determining that a jump instruction exists in the target buffer and a branch instruction corresponding to the jump instruction is not cached in the target buffer according to a precompiled result, prefetching the branch instruction from an icache into a candidate buffer corresponding to the processor core to wait for the processor core to fetch the branch instruction from the candidate buffer;
• in which the target buffer and the candidate buffer are alternately reused during instruction prefetching.

A non-transitory computer readable storage medium, having computer instructions stored thereon for causing a computer to perform the instruction prefetching method, comprising:

• before a processor core fetches a required instruction from a target buffer corresponding to the processor core, precompiling instructions in the target buffer;
• and
• in response to determining that a jump instruction exists in the target buffer and a branch instruction corresponding to the jump instruction is not cached in the target buffer according to a precompiled result, prefetching the branch instruction from an icache into a candidate buffer corresponding to the processor core to wait for the processor core to fetch the branch instruction from the candidate buffer;
• in which the target buffer and the candidate buffer are alternately reused during instruction prefetching.