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US 2021/0173570 A1Published application
Micro-processing circuit and data protection method for memory thereof
AssigneeNuvoton Technology Corporation
InventorI-Ching Chen
Life of this patent
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Abstract
A data protection method for a memory includes: detecting a data tampering event to generate a trigger signal; writing a lock signal into the memory during a first time frame based on the lock signal, in which the lock signal is adapted to prevent the protected data from being read; and erasing the protected data based on the lock signal during a second time frame, in which the first time frame precedes the second time frame.
Claims14
A data protection method for a memory, comprising:
- detecting for a data tampering event and generating a trigger signal;
- writing a lock signal into the memory during a first time frame based on the trigger signal, wherein the lock signal is adapted to prevent a protected data of the memory from being read;
- and
- based on the lock signal, erasing the protected data from the memory during a second time frame,
- wherein the first time frame precedes the second time frame.
2 more elements
A micro-processing circuit, comprising:
- a data tampering event detector, configured to detect for a data tampering event and generate a trigger signal;
- a memory cell array;
- and
- a memory controller, coupled to the data tampering event detector and the memory cell array, receiving the trigger signal and writing a lock signal into the memory cell array during a first time frame based on the trigger signal, wherein the lock signal is adapted to prevent a protected data in the memory cell array from being read, and the memory controller erases the protected data from the memory cell array during a second time frame based on the lock signal.
1 more element
Dependencies are inferred from the claim text.