System for visualizing power signal sequence

A system for visualizing power signal sequence, comprising:

• a microprocessor, being disposed on a main board of a host computer, and being electrically connected to a power management chip that is arranged on the main board;
• wherein the microprocessor comprises:
• a first conversion unit, being configured for receiving a power-on signal from the power management chip through a first signal transmitting channel, thereby converting the power-on signal to a first digital signal for digitalizing a number of occurrence times of the power-on signal;
• and
• a second conversion unit, being configured for receiving a power-off signal from the power management chip through a second signal transmitting channel, so as to convert the power-off signal to a second digital signal for digitalizing a number of occurrence times of the power-off signal;
• and
• a control module, being electrically connected to the microprocessor, so as to receive the first digital signal and the second digital signal from the microprocessor, and outputting a plurality of power monitoring data to an electronic device by using a communication unit thereof.