Gate driver power-saving method for switched-mode power supplies in pulse-skipping mode

A method of supplying power, comprising:

• operating a power supply circuit comprising:
• a switched-mode power supply (SMPS) circuit having a first input voltage node and a second input voltage node;
• and
• a charge pump comprising:
• a capacitive element having a first terminal and a second terminal;
• a first switch coupled between a first input node of the charge pump and the first terminal of the capacitive element;
• a second switch coupled between the second terminal of the capacitive element and a second input node of the charge pump;
• a third switch coupled between the first terminal of the capacitive element and the first input voltage node of the SMPS circuit;
• and
• a fourth switch coupled between the second terminal of the capacitive element and the second input voltage node of the SMPS circuit, wherein the operating comprises:
• in a first phase, closing the first and second switches and opening the third and fourth switches;
• and
• in a second phase, closing the third and fourth switches and opening the first and second switches;
• entering a power-saving mode for the power supply circuit by operating the charge pump in the second phase;
• and
• temporarily operating the charge pump in the first phase during the power-saving mode to recharge the capacitive element.

A power supply circuit comprising:

• a switched-mode power supply (SMPS) circuit having a first input voltage node, a second input voltage node, a third input voltage node, an output voltage node, and a reference potential node;
• a charge pump comprising:
• a first capacitive element having a first terminal and a second terminal;
• a first switch coupled between an input node of the charge pump and the first terminal of the first capacitive element;
• a second switch coupled between the second terminal of the first capacitive element and the reference potential node;
• a third switch coupled between the first terminal of the first capacitive element and the second input voltage node of the SMPS circuit;
• and
• a fourth switch coupled between the second terminal of the first capacitive element and the third input voltage node of the SMPS circuit;
• and
• a comparator having a first input coupled to the first terminal of the first capacitive element and a second input coupled to the second terminal of the first capacitive element.