Uninterrupted current sense

A DC-DC switched mode power supply, comprising:

• an inductor having a first terminal, and a second terminal for providing an output voltage;
• an output capacitor having a first terminal coupled to said second terminal of said inductor, and a second terminal coupled to a power supply terminal;
• and
• a converter comprising:
• a first power transistor for conducting a first current into said first terminal of said inductor during a first phase;
• a second power transistor for conducting a second current into said first terminal of said inductor during a second phase;
• a first current sensing circuit for providing a first sensed current in response to said first current and a copy of said second current;
• a second current sensing circuit for providing a second sensed current in response to said second current and a copy of said first current;
• and
• a sample-and-hold circuit responsive to said first sensed current for providing said copy of said first current, to said second sensed current for providing a copy of said second current, and to said first and second sensed currents for providing a total sensed current representative of a sum of said first and second sensed currents,
• wherein said converter controls said first and second power transistors in response to said total sensed current.

A method comprising:

• driving a first transistor to conduct a first current into an inductor when conductive;
• driving a second transistor to conduct a second current into said inductor when conductive;
• generating a first sense current in response to said first current and a copy of said second current;
• generating a second sense current in response to said second current and a copy of said first current;
• adjusting said first sense current in response to said copy of said second current when said first transistor is nonconductive;
• adjusting said second sense current in response to said copy of said first current when said second transistor is nonconductive;
• and
• controlling on times of said first and second transistors in response to a sum of said first and second sense currents (ISENSEOUT).