Integrated Circuits with Channel-Strain Liner
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsXusheng Wu, Chang-Miao Liu, Huiling Shang
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Abstract
Examples of an integrated circuit with a strain-generating liner and a method for forming the integrated circuit are provided herein. In some examples, an integrated circuit device includes a substrate, a fin extending from the substrate, and a gate disposed on the fin. The gate has a bottom portion disposed towards the fin and a top portion disposed on the bottom portion. A liner is disposed on a side surface of the bottom portion of the gate such that the top portion of the gate is free of the liner. In some such examples, the liner is configured to produce a channel strain.
Claims20
A method comprising:
- forming a fin structure over a substrate;
- forming a first gate stack over the fin structure;
- forming a source/drain feature in the fin structure;
- forming an etch stop layer on the first gate stack and the source/drain feature;
- forming a semiconductor liner layer on the etch stop layer disposed on the first gate stack and the source/drain feature;
- removing a first portion of the semiconductor liner layer from over the first gate stack such that a second portion of the semiconductor liner layer extends along a bottom portion of the first gate stack without extending to a top portion of the first gate stack after the removing of the first portion of the semiconductor liner layer;
- and
- oxidizing the second portion of the semiconductor liner layer to form an oxidized liner layer disposed on the bottom portion of the first gate stack.
A method comprising:
- forming a first gate stack and a second gate stack over a substrate;
- forming a source/drain feature in the substrate between the first gate stack and the second gate stack;
- forming an etch stop layer over the first gate stack, the second gate stack and the source/drain feature;
- forming a liner layer directly on the etch stop layer disposed over the first gate stack, the second gate stack and the source/drain feature;
- removing a portion of the liner layer from over the first gate stack and the second gate stack thereby forming a u-shaped liner layer extending between the first gate stack and the second gate stack;
- forming an interlayer dielectric layer over the first gate stack, the second gate stack and the u-shaped liner layer;
- and
- treating the u-shaped liner layer such that the treated u-shape liner occupies more volume than the u-shaped liner layer;
A method comprising:
- receiving a substrate having a placeholder gate disposed thereupon;
- forming a liner extending along a first portion of a side surface of the placeholder gate such that a second portion of the side surface is free of the liner, wherein the liner is configured to produce a channel strain;
- and
- replacing the placeholder gate with a functional gate.
Dependencies are inferred from the claim text.